1. Technical Field
An aspect of the present disclosure generally relates to a semiconductor device and a manufacturing method thereof, and more particularly to a three-dimensional semiconductor memory device and a manufacturing method thereof.
2. Related Art
The miniaturization of semiconductor devices has been made possible by reducing the feature size of the semiconductor devices. In recent years, the size limit for the feature size has made a three-dimensional semiconductor device the key to further miniaturization.
The three-dimensional memory device may include interlayer insulating layers and conductive patterns, which are alternately stacked on a substrate. A process of forming a stacked structure of interlayer insulating layers and conductive patterns may include alternately stacking interlayer insulating layers and sacrificial insulating layers, selectively removing the sacrificial insulating layers, and filling conductive patterns in areas in which the sacrificial insulating layers are removed.
However, the interlayer insulating layers may be collapsed or warped while removing the sacrificial insulating layers. As a result, it may be difficult for the interlayer insulating layers to maintain their intervals, and thus it may also be difficult to provide a stable stacked structure in a process of manufacturing a three-dimensional semiconductor memory device.